Designed for fabless companies and IDMs, Global Ops for Semiconductor provides complete visibility into all of your global semiconductor manufacturing processes, from e-test to wafer sort, and final test. As test programs are created or updated, you can automatically publish them into your supply chain ensuring consistency across your test fleet.

Already installed at over 90% of the foundries and OSATs that serve the semiconductor industry, Global Ops is the foundation for the Optimal+ Big Data Highway – our proven data infrastructure that makes the IIoT a reality, seamlessly connecting semiconductor companies to their supply chain, regardless of how their operations are organized.

Global Ops enables seamless visibility and communication between semiconductor product teams and their geographically-dispersed subcons. The solution provides deep, multi-stage product analytics and delivers extraordinary, near real-time response capabilities to decision makers before they become costly.

Data Integrity
  • Extract, clean, transfer, and standardize the data from your production floors, both internally and at your subcons
  • Create a “single point of truth” for sharing data across departments and with your suppliers
Actionable Data
  • Generate real-time alerts based on fully automated, user-defined rules
  • Leverage dozens of pre-defined rules that have been proven in high-volume production
  • Create, customize and simulate rules using our flexible Sequoia scripting language (incorporating R)
  • Publish real-time rules into the supply chain for ultimate control
  • Monitor yield and quality 24/7 and generate alerts in real-time
  • Validate performance vs. plan and insure supplier adherence to contract terms
  • Benchmark performance across OSATs and subcons to identify best practices and drive performance improvements
Cost Reduction
  • Improve yield through proactive rules for early detection of systematic, but difficult to identify, production problems
  • Leverage analytics to identify and reclaim devices wrongly binned as bad
  • Monitor test equipment station performance and identify outliers
  • Enable rapid problem resolution
Reduce Time-to-Market
  • Expedite the characterization phase for new semiconductor devices with pinpoint product analytics
  • Achieve faster yield ramp to volume production
  • Gauge the impact of engineering changes on production costs, yields, and quality
Improve Product Quality
  • Replace final test and pass/fail binning with analytics based on all parametric test results
  • Save good semiconductor devices that would otherwise be rejected
  • Catch bad semiconductor devices that nevertheless pass final test
  • Reduce RMA through robust measures of correlations


The Optimal+ Semiconductor Operations Platform Workflow

Our solutions are installed in 90% of the foundries and subcons serving the global semiconductor industry, enabling IDM and fabless teams to seamlessly collect, clean and collate their data sets directly from the source of their creation in preparation for extreme analytics and time-sensitive action. The data then goes through a multi-stage process that enables teams to manufacture actionable intelligence that drives every quantifiable performance metric, as described in the diagram below:


Comparing Test Time across a Fleet of Testers
Finding the Issue
A cross-entity rule triggers an alert when significant performance differences are detected between testers. A cross entity rule compares different entities (such as testers, probe cards and load boards) and highlights equipment with significantly poor performance.


Performing the Analysis
In this instance, the rule monitors the average good bin test time and flags slower testers that result in low throughput. The specific testers are checked and found to have incorrect settings which negatively impact their performance.

Preventing Future Recurrences
A rule is created within the solution to generate an alert when similar conditions resurface.


img_2 Comparing Test Time across a Fleet of Testers

Managing Online Retest Settings
Finding the Issue
An online retest dashboard detects that some of the testers are triggering more online retests then others.

Performing the Analysis
Normally, online retest is statistically the same across the test fleet. In this case, based on the data retrieved, the engineers realize that there is a fundamental difference in the way certain testers are performing retest. They check the online retest policy which is managed by the prober recipe and triggered by certain bin occurrences. They find discrepancies in the settings between different testers. Changing the settings resolves the issue.



img_2 Managing Online Retest Settings

Maximizing Yield through Probecard Performance Analysis
Finding the Issue
A high-level product-based report shows that a product is achieving lower than expected yield and higher than expected retest rates.

Performing the Analysis
By drilling down to individual tester performance within the Optimal+ solution the engineer is able to identify a specific probe card, which is causing the issue within a matter of minutes. The test house is notified and the probe card is removed for inspection.

Preventing Future Recurrences
A rule is created to automatically catch lots exhibiting high site-to-site yield discrepancies. The next time this problem occurs, an email alert can immediately be sent to the user so that the problem can be immediately resolved.



Step 1 – Analyzing a probecard shows site 3 with consistently low yield



Step 2 – Creating a rule to catch site-to-site deviations for this product



Step 3 – Receiving an alert when the problem next occurs

img_2 Maximizing Yield through Probecard Performance Analysis

Using Rules to Catch ATE Issues
Finding the Issue
A by-8 probecard is failing on all sites in some touchdowns due to a tester issue. The problem is detected automatically by an offline touchdown-monitoring pre-defined rule. Standard yield monitoring mechanisms fail to discover the issue because wafer yield is still above the acceptable threshold.

Performing the Analysis
The user receives an alert via email minutes after wafer probing is completed. The user views the wafer-map tool and informs the test house. The wafer is re-probed, significant yield is reclaimed and the user is able to view the results of the retest. The tester is investigated to find the root-cause of the problem.



img_2 Using Rules to Catch ATE Issues

Using Targets for Planning & Capacity
The Challenge
To accurately forecast the number of testers required over the next few months, planners need a mechanism to calculate the throughput of testers on their products (measured in Units per Hour – UPH). Planners want to make sure that the actual throughput of the testers matches the engineers’ expectations.

The Solution
A table of monthly targets is defined for the UPH measure in the Optimal+ solution. The target UPH is specified for each of the products being tested. A report is created to display the actual UPH (based on real test data) and compare it to the pre-specified target. The solution-generated view immediately highlights testers that are under performing. These testers are then investigated and plans are adjusted to allow for the shortfall.



img_2 Using Targets for Planning & Capacity