Designed for integration in test environments where decisions are taken both in real-time and offline, Escape Prevention from Optimal+ is an IIoT technology solution that comprises a powerful set of deterministic algorithms to address test process and operational issues to prevent test escapes in wafer sort and final test. 

Based on hundreds of post-mortem data analyses conducted on units returned by customers, Optimal+ designed and developed the Escape Prevention solution, enabling a paradigm shift in the semiconductor industry. 

For the first time, passing devices are being challenged in a timely manner before shipping to further increase product quality. Employing Optimal+ Escape Prevention to drive up quality assurance efforts on the manufacturing operations floor significantly improves the delivery of quality products to market.

50% RMA Reduction

Escape Prevention addresses test processes and operational issues that impact quality for real-time and offline decision making. Integrating easily into any manufacturing environment, it cuts customer returns (RMA) by as much as 50% by detecting marginal parts

Increases Quality & Reliability

Escape Prevention is a critical filter in keeping devices of questionable quality from reaching the customer, enabling engineering and product teams to properly assign every device using a quality index while killing questionable dice during test

Supports Automatic Bin Switching

When suspect dice are identified, they are automatically re-binned with no manual intervention required. Users can also define their own escape prevention rules and automatically publish them to the entire test fleet.  

Automated Rules Publication

Optimal+ Escape Prevention manages the publication of validated “escape” rules to the test floor across the distributed supply chain

 The Optimal+ Semiconductor Operations Platform Workflow

Our solutions are installed in 90% of the foundries and subcons serving the global semiconductor industry, enabling IDM and fabless teams to seamlessly collect, clean and collate their data sets directly from the source of their creation in preparation for extreme analytics and time-sensitive action. The data then goes through a multi-stage process that enables teams to manufacture actionable intelligence that drives every quantifiable performance metric, as described in the diagram below:


Detecting Parametric Test Freezes

Finding the Issue
An Optimal+ real-time parametric freeze rule detects a “frozen” test where similar values are being reported for a sequence of parts.

Performing the Analysis
After receiving the alert, the product and test engineer view the lot’s trend chart in the solution’s portal where the freeze is clearly visible. Since this is a quality issue with potential test escapes, the lot is retested.



img_2 Detecting Parametric Test Freezes

Using Data-Feed-Forward to prevent quality excursions

The Issue
For market segments that require the highest quality devices, cross-operational outlier detection is essential to preventing quality excursions.

Performing the analysis
For years, semiconductor companies have known that certain latent failures can result from device burn-in. The data-feed-forward capabilities in the Optimal+ Escape Prevention solution enable customers to compare parametric values pre- and post-burn-in. If the delta between the two parametric values exceeds a user-defined value, those devices can be dynamically re-binned to avoid shipment to key end customers. The example diagram below shows certain lots where a percentage of devices failed to meet the “drift” criteria and were automatically re-binned in the screening process.